GIGAPHOTON Inc., announced that following the high level of response to its initial March 2018 announcement of “FABSCAPE™” for the operational monitoring and analysis of semiconductor manufacturing equipment, at least seven major semiconductor chipmakers have been implementing the functionality into their manufacturing within 9 months after FABSCAPE™ was launched. FABSCAPE™ is an open platform capable of integrating the collection and analysis of operational data for the many and varied devices used in semiconductor manufacturing processes, and also efficiently resolving various problems relating to productivity and yield.
Researchers from EPFL's Nanolab have devised a lab-on-chip that integrates differently functionalized ion-sensitive FETs (ISFET) with specially designed microfluidics able to passively pump minute amounts of sweat to be analysed out of the wearer's skin, even when the subject is at rest. Ion-sensitive FETs (ISFETs) have no metallic gate, instead the gate oxide is directly exposed to a liquid environment and the gate electrode is replaced with a reference electrode (RE).
A Washington State University research team has uncovered significant and previously unknown vulnerabilities in high‑performance computer chips that could lead to failures in modern electronics. Researchers have been working to understand the vulnerabilities of computer chips as a way to prevent malicious attacks on the electronics that make up everyday life. The researchers found they could damage the on‑chip communications system and shorten the lifetime of the whole computer chip significantly by deliberately adding malicious workload.
Intel demonstrated a new 3D packaging technology for face-to-face stacking of logic, scheduled to be available in the second half of next year. The 3D packaging technology, known as Foveros, is the culmination of two decades of research at Intel into stacking die in three-dimensional heterogeneous structures combining logic and memory. Foveros technology will give designers greater flexibility to mix and match IP blocks with various memory and I/O elements in new form factors. The company also tipped a new processor microarchitecture and a new graphics architecture on a day when its chief architect laid out the company’s vision for future computing architectures.
The best type of device from which to build a neural network should be fast, small, consume little power, and have the ability to reliably store many bits-worth of information. Neural networks can be thought of as a group of cells connected to other cells. IBM’s latest entrant as the basis of the perfect synapse is called electrochemical RAM. The ECRAM cell looks a bit like a CMOS transistor. A gate sits atop a dielectric layer, which covers a semiconducting channel and two electrodes, the source and drain. IBM used measurements from its test cell to see how accurate a neural network made from a group of such cells would be.