Graphene is a fantastic material that could play a crucial role in making new nano-sized electronics, it is still extremely difficult to control its electrical properties. Researchers from Graphene Flagship partner DTU made a leap forward. They encapsulated graphene with another 2D material, hexagonal boron nitride, which is very similar to graphene, but electrically insulating. By using nanolithography, they carefully drilled nanoscopic holes in graphene through the protective layer of boron nitride.
Xilinx built smaller and thus better yielding 28nm chips and assembled them on an interposer. The system performance benefit ended up being financed by the very same yield that was supposed to be the problem. D2W bonding could also enable, for the want of a better description, ‘partitioned-systems’ like the current interposer systems but with chiplets instead of chips, and active silicon interposers instead of passive silicon interposers.
The latest high-density fan-out packages are migrating toward the 1µm line/space barrier and beyond, which is considered a milestone in the industry. At these critical dimensions (CDs), fan-outs will provide better performance, but there are several manufacturing and cost challenges to reach and break the 1µm barrier. Lithography plays a key role in fan-out and other packaging types. It is also critical in the fab, where lithography equipment is used to pattern features at the nanoscale.
Two-dimensional transition metal dichalcogenides (2D-TMDs) such as monolayer molybdenum disulphide (MoS2) are atomically thin semiconductors in which a layer of transition metal atom is sandwiched between two layers of chalcogen atoms, in the form MX2. The NUS research team combined multiple experimental techniques and first-principles calculations in their research work. This study provides new insights on the influence of interfacial hybridisation affecting the phase transition dynamics of 2D-TMDs.
Mobile Semiconductor announced a new 55nm HD (High Density) memory compiler targeted at the cost sensitive IoT market. The 55nm HD memory compiler takes advantage of industry standard Bitcells provided by the top foundries. Reducing the memory size offered by this new 55nm memory compiler gives a compelling reason to choose Mobile Semiconductor for their cost sensitive IoT products.