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More than Moore
Date
September 2017

The growing difficulty of cramming more features into an SoC is driving the entire chip industry to consider new packaging options. The complexities that IC packaging can handle today are fairly limited as we are seeing more of the value creation shifting to the package and because of the cooperation between package and silicon, we are running into a big headache as there is no such thing yet as a die-package co-design flow. To be successful, packaging has to come close to the PPA benefits provided by Moore’s Law scaling, with the added benefit of faster time to market.