According to the aggressive market forecast scenario, by the year 2022 we will see solid state batteries in the market. Recent developments on this front include partnership between Volkswagen and QuantumSpace. Earlier many different players have tried to develop the prototype cells but only to see their efforts go in vain. As a result many technological challenges have remained unsolved. The main challenges include electrolyte material screening, ionic conductivity enhancement, electrode interface stability, lithium metal anode, separator coating, cell and pack manufacturing methods, BMS and battery pack design.
The focus of semiconductor companies is to look for technology solutions that can bridge the gap and improve the cost effectiveness of devices with added functionality. More-than-Moore devices show the characteristics of the desired technological integration and their importance will increase in the coming years. From 2017-2013, the demand for such devices is an impressive 10%. This analysis is relevant to 5G with wireless infrastructure & mobile segments, mobile including additional functionalities, voice processing, smart automotive & electrification, AR/VR , and AI .
Apple’s A10 processor built on TSMCs integrated fan-out technology is the front runner in the fan-out packaging market. The news article, though, is related to show the development in low density fan-out packaging. The LDFO technology is already being used in automotive electronics for advanced driving assistance. With the emergence of fan-out technology, suppliers are also on the rise. M-series by Deca technologies places chips with the active layer face up and then molded over the top in a continuous layer to fully encapsulate and encase the chips. This fully molded structure provides better mechanical protection for the active side of the device and provides an additional buffer layer between the die and BGA array. This improves the reliability of devices and hence are actively used in mobile chipsets.
The industry is starting to gear up for development in 3nm chip. Though it is an highly ambitious plan, the vendors will face a lot of technical and cost challenges, the design cost itself exceeding $1 billion. Samsung and Global Foundries separately announced plans to develop a new transistor technology called a nanosheet FET, with variable widths at 3nm. The finFET, toady’s leading-edge transistor is ramping up at 16nm/14nm and 10nm/7nm. By 2020, 5nm finFETs are expected in market but the industry is conscious about the evolution from 5nm to 3nm finFETs.
Trade war between US and China seems to have heated up after the Trump administration announcing to impose 25% tariffs on $50 billion of Chinese goods, including many products in the semiconductor supply chain. The administration defended its decision by stating that it is necessary to reduce the $375 billion trade deficit with China. The SEMI trade group which represents the semiconductor industry, appreciated the effort to protect intellectual property rights but believes that tariffs will have less impact on the U.S. concerns over China’s trade practices.