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Tech Updates

Silicon Photonics trend
Date
September 2017

Silicon photonics is gaining significant traction inside the data center, but creating a simpler method of packaging the laser with other circuitry remains a stumbling block for cutting costs. Interconnect speeds based on silicon photonics in various applications will depend on implementations at various process nodes. The reason for the delay within packages is related to both cost and technical issues. Harnessing light in a package has proven much harder than having an external laser source because the laser typically relies on a III-V material such as indium phosphide (InP), which has to be bonded somehow to CMOS-based circuitry.

 

EMI Shielding
Date
September 2017

Henkel Adhesive Technologies’ Electronics business today announced the introduction of two novel, conformal coating metal inks for semiconductor package-level electromagnetic interference (EMI) shielding. These metal inks  offer superior flexibility in deployment and design, as they may be used with cost-effective spray coating equipment, while providing EMI shielding performance comparable to or better than capital-intensive, thin film metal deposition techniques.

Date
September 2017
Source

The TSMC foundry celebrating its 30th anniversary, reported pogress in 7nm and extreme ultraviolet (EUV) lithography and bolstered a planar process that competes with fully depleted silicon-on-insulator at the annual event. Targeting chips for the Internet of Things as well as 5G cellular, TSMC added a 22-nm ultra-low leakage (ULL) variant to its 22-nm ultra-low power (ULP) planar process. In between its 7- and 22-nm nodes, TSMC is developing a 12FFC process that should be ready for production in 2019 using a new six-track (6T) standard cell library, down from 9T and 7.5T on the 16FFC node.

Date
September 2017

Cadence has developed enhancements to the TSMC’s chip-on-wafer-on-substrate (CoWoS) advanced packaging technology. They include Integrated electromagnetic interference (EMI) analysis that enables analysis of the CoWoS system, Static/dynamic IR analysis from a single environment, Correct cross-die interface alignment among dies and interposers, Correct cross-die interface alignment among dies and interposers, Thermal analysis across the CoWoS package, allowing accurate thermal runway predictions and reduced EM pessimism, Parasitic extraction for silicon interposers, enabling timing and electrical analysis.

Date
September 2017

The technology is related to conductive inks and transparent conductive films. The IME manufacturing process is said to produce less waste than using PCBs or flexible printed cables, making it very friendly to the environment and less costly in the long run. Holst Centre, the European research and development organization, worked with DuPont and other industry vendors to develop an IME demonstrator that could serve as a center console in vehicles. In-mold electronics enables the development of structural electronics, where the electronics are integrated into the structure.